Re: gEDA-user: Mechanical/Documentation layer in PCB

[Bert Timmerman <bert.timmerman@xxxxxxxxx>]

Hi DJ,

Would the problem Levente has been solved by adding a new layer
"mechanical" to yet another layer group not being a member of "solder",
"component" or one of the inside copper layer groups.
Of course, entities on this new layer should not touch pins or vias :)
for this would spoil the trick, the same Good Practice as with silk
layers.

Kind regards,

Bert Timmerman.


On Mon, 2008-07-07 at 17:16 -0400, DJ Delorie wrote:
> > Maybe add the layer names "ignore" and/or "mechanical" to the
> > special cases (like "outline" and "keepout") and test for these and
> > ignore them during DRC.
> 
> No, the right thing to do is for me to do the layer types patch I've
> been talking about forever.  It's needed for many other things, and
> will solve this type of problem without needing to add more hacks.
> 
> 
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