Re: gEDA-user: 74xx series

["Samuel A. Falvo II" <sam.falvo@falvotech.com>]

On Friday 25 June 2004 07:20 am, Stephen Meier wrote:
> 1) Implicit connections are good when they help minimize the crowding
> of a schematic.

Just have a separate page that has nothing but power connections on it.  
Problem solved.  This is a very common practice.

> 2) Others who then look at the schematic often ask where is the power
> and ground (not for ttl since it allways found on the same spot for
> conventionally shapped chips)

For simple TTL chips, sure.  More sophisticated TTL chips sometimes will 
have their power pins in other locations.

> 3) Implict connections are bad for high speed analog where you want to
> filter the devices power from the boards power.
>
>                                        _______
>                 L1                 |
>
>   +5V   -/\/\/\/\/\------------|  Vcc
>                          __|__    |
>                   C1   __ __   |
>
>                           Gnd

You must have used a proportional-width font to render the above diagram.  
Please don't -- I don't think I need to explain why.  :)  Use a 
fixed-width font instead.  Here is the corrected diagram, as best as I 
can re-architect:

             L1
   +5V o--\_/\_/\_/-------------*----------o +Vcc
          =========           __|__
                         C1   _____
                                |
                               ---
                               /// 
                               Gnd

Please use a fixed-width font to view this, such as Courier New.

--
Samuel A. Falvo II