Re: gEDA-user: Path Delay in Icarus Verilog

[John Sheahan <jrsheahan@xxxxxxxxxxxxxxxx>]

icarus does not yet support specify blocks in general.

You can use a blocking assign in the meantime.
john


Peter Kaiser wrote:
> Hello everybody,
>
>
> I got a library with modules like this:
>
>
> ------------------------------------
>
> `timescale 1ns/10ps
>
> module INLX1 (
>    Q,
>    A
>    );
>
>    input  A;
>
>    output Q;
>
>     not (n_0,A);
>     buf (Q,n_0);
>
>    specify
>         specparam       Area$           = 88.32;
>
>         specparam       FanoutLoad$A    = 0.009;
>
> //
> // path delay
> //
>
>         (A => Q) = (0.1,0.1);
>
>
>    endspecify
> endmodule
>
> -------------------------------
>
> I can't see the path delay in my simulations. Do I something wrong?
>
>
> Peter