Re: gEDA-user: Noob question involving icarus verilog, linux and FPGA's

[shogi@xxxxxxxxx]

> On 6/12/05, shogi@xxxxxxxxx <shogi@xxxxxxxxx> wrote:
>> A. When trying to synthesize the following program:
>
> What was the iverilog command line you used to synthesize the design?
>
> --
> - Charles Lepple
>
>

I tried

iverilog -t fpga -o simple.edf simple.v

and

iverilog -s chip_root -t fpga -o simple.edf simple.v