Re: gEDA-user: Assign polygon/rectangle to a net in PCB

["James Johnston" <mail@xxxxxxxxxxxx>]

Thanks!  I think I understand the rectangle/polygon feature better now.  It
still seems awkward to use sometimes, but it works.  But, when following the
advice, it triggers a bunch of "potential for broken trace" DRC errors...
what gives?  I *think* my layout is ok, at least it looks ok...  But the DRC
errors are annoying...  I wonder if I'm doing something wrong or if the DRC
errors are unavoidable in this scenario and can be ignored.

-----Original Message-----
From: geda-user-bounces@xxxxxxxxxxxxxx
[mailto:geda-user-bounces@xxxxxxxxxxxxxx] On Behalf Of DJ Delorie
Sent: Tuesday, June 17, 2008 00:21
To: geda-user@xxxxxxxxxxxxxx
Subject: Re: gEDA-user: Assign polygon/rectangle to a net in PCB


> Using the technique in the message, I created a line starting from the
> center of the thermal pad, and then continued to draw a rectangle using
> lines to cover up the clearances created by the thermal pad in the
> footprint.  It works but it seems awfully cludgy... is this the best way
to
> handle that scenario?

At the moment, yes.


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