Re: gEDA-user: SPICE/gEDA updated. . . . .

[sdb@cloud9.net (Stuart Brorson)]

Sorry for the delay in responding. . . . .

> As a more concrete example, suppose you have a standard CMOS process.  You
> may have only 2 models for transistors.  One is NMOS and one is PMOS.  If
> you take a look at the line in a spice netlist for say the nmos
> transistor, it looks something like:
> 
> M1 drain_node gate_node source_node bulk_node model_name list_of_parameters
> 
> This may look like:
> 
> M1 2 1 0 0 nmos W=100u L=0.6u
> 
> in its most basic form where W and L are gate width and length.  So far,
> we can get by with a simple .include statement to pull in a model file for
> the process which would include a nmos model (plus probably a pmos model
> and perhaps some resistor and capacitor models).
> 
> 
> However to properly model the diode formed by the source/drain diffusions
> and the substrate, you also need to specify the AS, AD, PS, PD parameters.  
> Now your FET call looks more like:
> 
> M1 2 1 0 0 nmos W=100u L=0.6u AS=200p AD=200p PS=204u PD=204u
> 
> where the exact calculation of what AS, AD, PS, and PD is based on 
> 
> - what are W and L
> - how many fingers used in the device (you wouldn't make a 100u x 0.6u
>   rectangle but would break this into perhaps 10 rectangles which are 10u
>   x 0.6u)
> - what is the minimum gate to contact spacing
> - what is the contact size
> - what is the minimum amount the diffusions must enclose contacts by.
> 
> So in practice what happens with a tool such as cadence, a process design
> kit has been developed so that when you enter W and L for a device, the
> tool calculates what AS, AD, PS, and PD will be so that when the netlist
> is created for simulation, those values (fully evaluated, ie, the
> netlist doesn't have equations but rather the outputs of equations) are
> included in the netlist.
> 
> To summarize, for IC work, you typically have both a model file which gets
> included somehow and some other technology specific setup which affects
> how a schematic gets netlisted including doing things like calculating
> additional parameters from a set of specfied parameters.
> 
> Hope this clarifies things a little bit.


Yeah, thanks.  Now some questions:

1.  Will the parameters of the calculations apply to *all* MOSFETs?
Or to just those whose model-name is "nmos"?    The point here is that
I need to know what attribute to key off of -- the (DEVICE or REFDES)
or the MODEL-NAME.

2.  Are the formulas used the same for  all MOSFETs?  Or does they vary
from model to model?  (Note that I don't mean the coefficients, but
rather the actual form of the formulae.)

This is important because if the formulae are the same for all
MOSFETs, you can build them into the netlister.   The netlister
recognizes different components based upon their DEVICE attributes, or
the first letter of their REFDESs.  Once  the device type is
recognized, a different Scheme function is used to handle each
different device.  If the formulae are the same for any particular
device,  the scheme function can just parse up the component
parameters, get the coefficients from the tech file, and use built-in
formulas to get the desired output  parameters.  Although it is not
trivial, I can envision how to do this. 

However, if the forumlae are different depending upon the individual
device (i.e. depends upon the model), you need to build the formula
itself into the technology file, create an execuitable Scheme
expression from it, and then execute an "eval" in Scheme.
This seems to me to be fairly difficult, or at least more of a PITA. 

Stuart