Re: gEDA-user: Icarus multiplier lpm

[Tom Hawkins <tom@xxxxxxxxxxxxx>]

Tomasz Motylewski wrote:
> > However, it turns out that the IEEE1364-1995 standard was overruled
> > by the -2001 standard which changes the rule to the width of a
> > multiply being figured the same way the widths of a sum are figured.
> > The older behavior makes much more mathematical sense, but engineers
> > are not always logical, and practical engineers even less so:-)
>
>
> What? For me it is clear that when I multiply two 8 bit numbers I will get 16
> bit number.
>
> If the default has changed to only give upper 8 bit of the result, how do I
> still force my code to generate 16 significant bits? Should I do:
>
> input [7:0] a;
> input [7:0] b;
>
> {8'b0,a}*{8'b0,b}
>
> to get full a*b ?

The trick is to use sign extensions:

// Note the different operand widths for generality.

wire [3:0] a;
wire [7:0] b;

wire [11:0] x_unsigned;
wire [11:0] x_signed;

assign x_unsigned = {8'b0, a} * {4'b0, b};

assign x_signed = {8{a[3]}, a} * {4{b[7]}, b};


Synplify, and other FPGA synthesis tools will identify x_signed
as coming from a signed multiplier, even though a, b, and x_signed
are unsigned datatypes.

-Tom

> And what do some FPGA vendors mean by "embedded 18 bit multiplier" ?
>
>
> Best regards,
> --
> Tomasz Motylewski
> BFAD GmbH