Re: gEDA-user: Icarus multiplier lpm

[Tomasz Motylewski <T.Motylewski@xxxxxxx>]

> However, it turns out that the IEEE1364-1995 standard was overruled
> by the -2001 standard which changes the rule to the width of a
> multiply being figured the same way the widths of a sum are figured.
> The older behavior makes much more mathematical sense, but engineers
> are not always logical, and practical engineers even less so:-)

What? For me it is clear that when I multiply two 8 bit numbers I will get 16
bit number.

If the default has changed to only give upper 8 bit of the result, how do I
still force my code to generate 16 significant bits? Should I do:

input [7:0] a;
input [7:0] b;

{8'b0,a}*{8'b0,b}

to get full a*b ?

And what do some FPGA vendors mean by "embedded 18 bit multiplier" ?


Best regards,
--
Tomasz Motylewski
BFAD GmbH