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Re: gEDA-user: problem



I've done boards with 622Mbps parallel busses and 2.5Gbps diff traces
on FR-4 in the past.  The boards had through vias carefully placed at
either the source or termination of the signal path.  I don't think
you'll have a problem, as long as you don't put the vias in the middle
of your transmission line.  Of course, you want to carefully terminate 
your transmission lines.

Think of it this way: 2.5Gbps optical transceivers come with
through-hole pins, which are much nastier than a small via.  But they
work fine.  An 0805 resistor pad presents much larger capacitance than
a small via, and yet folks use them all the time for termination &
they work (although I agree that 0603 is better, depending upon your
trace widths).  Finally, lots of 2.5Gbbps <-> 622Mbps SERDES chips
come in BGA packages, requiring you to route the high speed signal
through a BGA pin field, which is a nasty electromagnetic
environment, but they work fine too.

There is a lot of work out there on via models & the effects of vias
on high-speed signals.  I suggest you Google around on terms like "via
signal integrity" and read what experts say about this stuff.  Also,
Howard Johnson's book is a must-read on the subject: 

http://www.sigcon.com/bookHSDD.htm

Also, lots of discussion on this issue is available on the Signal
Integrity e-mail list archives:

http://www.freelists.org/list/si-list

Finally, as far as a work-around for buried vias using PCB, the only
way I can think of doing it involves creating your design with the
tool, and then splitting the .pcb file up into several files, and hand
editing each one to remove the via pad where you don't want it.
You'll also need to edit the drill file.  This all is extremely
painful.  In any event, I am not the PCB expert, although I have some
passing familiarity with the file format.  And at least the file
format isn't architected to support buried vias.  

Stuart




> not quite! but we are looking into 6 layer boards for PC applications, ru=
> nning at a few hundred MHz.
>  I am worried about signal reflections from such large height vias.
>  Thanks
>  Amr
> 
> Stuart Brorson <sdb@xxxxxxxxxx> wrote: Ummm, are you sure you need to use=
>  buried vias?  Most PCB fab houses
> don't support them; they are used on super-dense, high-tech boards,
> and you pay mucho extra $$$ to get them.  They are not used on
> entry-level to mid-level boards. =20
> 
> If you *are* using PCB to design a 20 layer OC-192 router board with
> 10Gig diff co-planar waveguides and 622Mbps parallel busses, then
> bully for you!  Let us know how it goes!=20
> 
> Stuart
> 
> 
> > Hello
> > Is there a work-around to the absence of buried vias? for example,=3D20
> > edit the drill file to remove a specific thru-hole, and copy this=3D20
> > via into the file for layer 2-3?
> > Best Regards
> > Amr Bayoumi