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Re: gEDA-user: basic anti-EMI design q



> You're going to send this board out to a fab house, right?

Right.  The current choice is pcbpool - 4 layers 20 sq, 6/6/12, qty 1,
for $104.  Unless find two other people who want a generic cpu/net/AC
board, in which case it's about $160 for 3.

However, it's really hard to hack the inner layers, if needed.

> So why waste time and increase risk to save two digits of cost?

Well, it's more a question of "will it help with EMI"?

> The latest thinking on this is: Use one plane.  Keep analog and
> digital components physically separated, but don't split the plane.

Problem is, the CPU/net is between the power supply and the I/O blocks
:-P I figured for the I/O power I could run a trace around the edge,
so no signal traces cross it, and have the FETs bridge the gap.

> If you split the plane, you run the risk of running tracks over
> slots and other GND structures in your board which can
> radiate/receive & can contribute to SI problems.

Actually, I think I can easily avoid this.  The I/O block is near the
edge anyway, so the only things that go there are the things that need
the isolation.  The 10baset is also not much of a problem, it's near
the P/S anyway and the gap would only surround the analog half of the
chip and the magnetics.

I just don't know if it will make a difference.  Remember, it's not
*generated* EMI I'm worried about, it's *received* EMI.  Hence, I'm
trying to isolate the I/O power - the 18g wires to the thermostats,
the 10baseT wire, and the 24VAC power wire.  Those wires act as
antennas to pick up crap from the rest of the furnace, I'm trying to
keep the crap away from the CPU.

> http://www.hottconsultants.com/techtips/split-gnd-plane.html
> www.national.com/appinfo/adc/files/questweb_dec_2001.pdf

Ah, more late night reading :-)

> p.s. I will try your latest and greatest PCB version with the
> autotools fix tomorrow.  Thanks for working on this!

You're welcome!