Re: gEDA-user: basic anti-EMI design q

[sdb@xxxxxxxxxx (Stuart Brorson)]

> However, it's really hard to hack the inner layers, if needed.

The usual stack-up for something like this would be:

sig
-----------
gnd (plane)
-----------
pwr (plane)
-----------
sig

If you use planes on the inner layers, most or all of your hackery
will only need to be on the accessible surface layers. 

> > So why waste time and increase risk to save two digits of cost?
> 
> Well, it's more a question of "will it help with EMI"?

Yes.  As Bill points out, keeping the GND plane next to the sigs
provides a place for the return currents to flow right next to the sig
currents, vastly reducing the size of any loops which can pick up
(or also raidiate) noise.

Don't forget to decouple everything throroughly:  .01uF ceramic cap on
every power pin, and a handful of 10uF (or thereabouts) Ta caps
scattered around the board to decouple pwr & gnd.

> > The latest thinking on this is: Use one plane.  Keep analog and
> > digital components physically separated, but don't split the plane.
> 
> Problem is, the CPU/net is between the power supply and the I/O blocks
> :-P I figured for the I/O power I could run a trace around the edge,
> so no signal traces cross it, and have the FETs bridge the gap.
> 
> > If you split the plane, you run the risk of running tracks over
> > slots and other GND structures in your board which can
> > radiate/receive & can contribute to SI problems.
> 
> Actually, I think I can easily avoid this.  The I/O block is near the
> edge anyway, so the only things that go there are the things that need
> the isolation.  The 10baset is also not much of a problem, it's near
> the P/S anyway and the gap would only surround the analog half of the
> chip and the magnetics.

The reason to use one plane is that it is easy.  If you try to do a
split plane on an analog/digital design of reasonable component
count/complexity, you end up gerrymandering the two GND planes to pick
up all the different analog & digital nets.  You also have to think
harder during placement about how to place and orient each component
to facilitate the two planes [1].  This takes time, and
there is always the possiblity of an error in which some current takes
a return path you didn't anticipate, and you end up with noise.

In any event, you'll need to
classify each net as either analog or digital, and then make sure that
the correct GND plane runs underneath it.  If you're worried about EMI
pick-up, it's particularly important that all nets travel over their
associated GND planes.  Don't allow any loops since they are the
structures which are most sensitive to magnetic pick-up.

Finally, don't forget to use 1 oz copper for the planes, or even 2 oz
if you really want to pull out all stops.  I am not an expert, but
folks who worry about components causing ground bounce might be better
served using heavy PWR/GND planes instead of playing with split planes
in order to reduce series resistance in the PWR & GND nets.

Another little trick:  For low current analog components, I usually
put a 10 or 20 ohm 1206 resistor in series with the power net, and
then the bypass cap directly on the power pin.  (0805 is also OK as
long as you obey the resistor's power diss limit based upon the max
supply current draw of the analog part.)  The RC provides just a 
little bit more filtering than a straight cap on a pin attached to
pwr.  Also, if a component turns out to be particularly sensitive
during DVT, I can swap out the resistor for an EMI bead to get
additional filtering.   

> I just don't know if it will make a difference.  Remember, it's not
> *generated* EMI I'm worried about, it's *received* EMI.  Hence, I'm
> trying to isolate the I/O power - the 18g wires to the thermostats,
> the 10baseT wire, and the 24VAC power wire.  Those wires act as
> antennas to pick up crap from the rest of the furnace, I'm trying to
> keep the crap away from the CPU.

Hmmm, I should have realized that your biggest problem might just be
all the wires you use to connect to the board.  In this case, make
sure each sig wire runs next to its GND/return, and there are no big
loops between a sig wire and its return.

You might also want to look at Tusonix for filters & EMI blockers on
all incoming nets:

http://www.tusonix.com/

DC power nets get big LC filters (don't forget to put a backwards
diode across any series inductors), and you can also put smaller
filters on your analog nets.  Digitial nets might require more
finesse, but you can always put a DEPOPed 0ohm resistor around any
filter you make, and then play games with bypassing any filters you
don't need or hurt your signals.  

Finally, if your environment is really harsh, you might need to put
your circuit in an EMI shielding box.  However, my furnace has
the control board just sticking out from its side without any
shielding, so I don't think the environment is *that* bad.  OTOH, my
furnace is in sunny Massachusetts, not in frigid New Hampshire, so
it's probably lighter duty.  :-)

Stuart

[1]  Yes, you need to separate analog and digital stuff during
placement using a single plane also.  However, you don't need to think
as much about stuff like orientation & relative placement.  The
benefit of a single plane is that it is easier & less prone to
gotchas.