[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: gEDA-user: basic anti-EMI design q

At 12:51 24-3-2006, you wrote:
On Fri, Mar 24, 2006 at 10:41:48AM +0100, Bill Sloman wrote: 

<snip>

>
> Inner ground planes are surprisingly effective in reducing received
> EMI. Effectively you form a negative image of the extemal EMI source
> behind the ground plane and the sensitive trace sees the dipole field
> just above the ground plane (where the dipole field has to be zero).
> Because the gap between trace and ground plane is small, the filed is low.

But will this not add a capacitance to the traces which can be a problem
for HF circuits?

HF circuits usually treat the traces as transmission lines over ground plane - you have to use narrower traces on four layer boards to get the 75R or 50R impedance that you usually want, but this is rarely a problem. When you get to buried striplines inside 6- and 8-layer boards, 75R tracks can be impractically narrow, but ti isn't a problem with microstrip on the outer layers.

Find a ECL application note somewhere. Motorola/ON-Semiconductor/FreeScale or what they are calling themselves at the moment has a pretty good set of ECL application notes, as does Fairchild

http://www.fairchildsemi.com/an/AN/AN-768.pdf
--
Bill Sloman, Nijmegen