Re: gEDA-user: Icarus Verilog with Xilinx simprims...

["CSB" <csb_cbw@xxxxxxxxxxx>]

Wow, thanks for the quick responses !

> Does iverilog support SDF backannotation?  The SDF has the delay  
> information.

Ah ! Now you mention it, I remember removing a $sdf_annotate line
from the generated verilog file. It was causing an error with vvp,
so I just removed the offending line and quickly forgot about it... The
error is: "$sdf_annotate: This task is not defined by any modules."
I just found a topic about iSDF in this mailing list; I will see what
I can do with that.
 
> Any specific reason why you're running a post-fit simulation?  The  
> RTL simulation tells you if your logic is functionally correct, and  
> the static timing analyzer (using your timing constraints) tells you  
> if you've met timing.  If both are good, there's no need to run a  
> post-fit simulation.

Well, that's where I'm most confused. I followed some instructions
that explained how to use TestBencher (part of ISE). Is that what
you are referring to? What I saw of it didn't impress me much...
For my design, I didn't specify any timing constraints since I'm not
concerned so much about speed as correct operation. Also, the amount
of specify-able stuff was overwhelming, so I decided to skip that
part 8~)
My reasoning was that I would run a post-fit simulation, and see if
there were any glitches, or unusual operation. Mostly, I was thinking
about timing hazards.
But your comment makes me ask: does the fitted design guarantee
a glitch-free operation ? (the only remaining issue would be speed,
hence the timing constraints)

I should also add that I'm fairly new to digital design, so I might
be missing the point entirely.


> Dr. Deming told us that the Asian focus on direction of most closely
> approaching perfection is a better goal than arbitrarily chosen
> accept/reject criteria American style.  Perhaps he was thinking
> orientally?

While I tend to agree with the oriental principle, I can't pretend
to be looking for perfection for the moment. Functionality would be a
good start ! Perfection can come later; I need to walk before
I can run...


Thanks for your time,
Christian
-- 
  CSB
  csb_cbw@xxxxxxxxxxx

-- 
http://www.fastmail.fm - Same, same, but different?



_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user