gEDA-user: Icarus Verilog: 20081118 snapshot FPGA synthesis on Windows

[Patrick Doyle <wpdster@xxxxxxxxx>]

   When I try to target an FPGA with the 20081118 snapshot of Icarus
   Verilog on a Windows platform, I get:
   iverilog -tfpga -parch=virtex2 -o core_sm.edif broken.v
   ERROR: Unable to read config file: c:\iverilog\lib\ivl\fpga.conf
   error:  failed to load.
   : The specified module could not be found.
   I don't know if this is a Windows issue (I can try my Linux platform
   when I get home tonight), or a snapshot issue (the FPGA target does
   work with 0.8.6 version I was running), or something else.
   Any pointers? thoughts?
   --wpd


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