[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

gEDA-user: mcu to sdram interface project



I finally got a verilog module that does a basic SDRAM interface (I
talked about this a little at the last freedog meeting) so I started
uploading stuff:

	  http://www.delorie.com/electronics/sdram/

Nothing fancy yet; it does an activate/transfer/precharge for every
access the MCU makes.  Perhaps later I'll add some smarts to it to get
rid of the *one* read wait state it requires - the MCU has a 35ns
setup time, so there's not much time to get the data out (and yes,
that's an obvious spot to add a burst cache).  The MCU only runs at
24MHz, the SDRAM is 133MHz (potentially asynchronous).

Board's not done yet, but the interesting signals are routed
(mcu-fpga-sdram).


_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user