Re: gEDA-user: How to fit REFDES on PCB with Hierarchy

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Friday 20 March 2009, gene glick wrote:
> Is it ok to use "." as the delimeter in the hierarchy name?
>  For example S6.S2.C2
>
> The "." uses up sooo much less room than the "/" and I think
> it reads kind of nice.

Spice and Verilog use "." as the separator, so using "." would 
help make things more consistent with other tools.



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