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Re: gEDA-user: [ problem with the 40106 symbol ]
On Mar 30, 2010, at 5:39 PM, lementec fabien wrote:
> Hi,
>
> I am a very beginner using the geda toolchain,
> please excuse if those are obvious errors.
>
> I am trying to use the 40106 hex inverter without
> success in a project.
OK, let's see:
1. That's a slotted symbol, intended for printed circuit layout, not simulation. You cannot use slotting in a schematic that will be used to make a SPICE netlist.
2. There's no SPICE model specified in the symbol. Generally for simulation of complex parts you must get the model from the manufacturer. But I doubt you'll be able to find a 40106 SPICE model, as SPICE is primarily an analog simulator, but the 40106 is a digital part.
>
> You can find another project using the same component,
> that has the same error, at:
> wget http://www.bobdbob.com/~protius/quantel/headlogic.sch
So many errors in that file. Missing values, unspecified refdeses, open circuits due to misplaced ground symbols, ...
>
> I include the error outputs:
>
> texane@debian:~/repo/engineering_book/electronics/geda/spice/us.0$
> gnetlist -g spice -o main.{net,sch}
> Command line passed = gnetlist -g spice -o main.net main.sch
> Loading schematic
> [/home/texane/repo/engineering_book/electronics/geda/spice/us.0/main.sch]
> Invalid wanted_pin passed to get-nets [unknown]
> Invalid wanted_pin passed to get-nets [unknown]
Usually this means that there's a duplicate refdes/pinseq pair. Since every slot has the same pinseq on its pins, that'll happen if you attempt to use slotting.
> ... // repeated multiple times
>
> with the drc2 backend:
> texane@debian:~/repo/engineering_book/electronics/geda/spice/us.0$
> more main.net
> Checking non-numbered parts...
>
> Checking duplicated references...
>
> Checking nets with only one connection...
> ERROR: Net 'VSS' is connected to only one pin: U1:7 .
> ERROR: Net 'VDD' is connected to only one pin: U1:14 .
You have no power source.
>
> Checking pins without the 'pintype' attribute...
>
> Checking type of pins connected to a net...
> ERROR: Pin(s) with pintype 'output': U1:12
> are connected by net 'unnamed_net6'
> to pin(s) with pintype 'power': V1:1
> ERROR: Pin(s) with pintype 'output': U1:8 U1:10
> are connected by net 'n1'
> to pin(s) with pintype 'output': U1:8 U1:10
> ERROR: Pin(s) with pintype 'output': U1:4 U1:6
> are connected by net 'unnamed_net2'
> to pin(s) with pintype 'output': U1:4 U1:6
The model of the world drc2 implements is that you nothing but a single flavor of CMOS logic on a printed circuit board. For semi-analog circuits to be modeled by SPICE, it's not very useful.
>
> Checking unconnected pins...
>
> Checking slots...
>
> Checking duplicated slots...
>
> Checking unused slots...
>
> No warnings found.
> Found 5 errors.
>
>
> Thanks for helping,
I suggest reading the tutorial at:
http://www.brorson.com/gEDA/SPICE/intro.html
Understand that a schematic suitable for simulation is a different beast from a schematic suitable for printed circuit layout. gschem works well for either, but the approach you need to take is different in the two cases.
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx
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