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Re: gEDA-user: subcircuit definition and channelised design
Lots is possible, but I'm not sure how you would best go about it.
gEDA's bus support is almost non-existent... it is just a graphical
nicety, and relies upon named nets. (I vaguely recall that Altium buses
can work like this too if you want)
I haven't really used busses properly in Altium - as you described,
I've primarily used them just as a graphical nicety while explicitly
naming all the connected nets. There may have been a few cases where I
named the bus and then connected nets were given the bus prefix, or
something like that. But at the time I was just experimenting and
didn't really need or find this sort of functionality added much value.
(I imagine with a number of 32/64 bit busses something that removed the
need to individually name nets would be handy though)
In terms of the channelisation functionality my current thought is that
I may be able to augment the gnetlist pcb backend to recognise
something similar to a bus notation and recognise when a
symbol/subcircuit needs to be replicated. (btw - I haven't yet started
looking through the gnetlist backend sourcode or doco so if this sounds
like something impossible - feel free to give me a heads up :)
cheers,
Geoff Swan
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