gEDA-user: Spectrum analyzer: was Clearing mask to mount shields

[Darrell Harmon <dlharmon@xxxxxxxxxxxx>]

On Sat, May 06, 2006 at 02:32:39AM -0400, Dan McMahill wrote:

> sweet!  I can't wait to see it.  Does this interface with your SBC?  

It uses a board based on the new Blackfin DSP with Ethernet. It is
similar to my DSPcard project except it has Ethernet and no USB.

> I'm
> curious as to what sort of design tools you used for the bandpass
> filter.  I did quite a bit of work many years back on a filter design
> toolbox for matlab which I really need to pick up again and release for
> octave or scilab.  Too many projects, not enough time...

I used WA4DSY's nice web based interdigital bandpass filter designer for
the IF bandpass filters (2.15 GHz, 8 MHz BW). I have built and tested 
these. They match the plot given on the website very well and are easy
to tune.
http://www.wa4dsy.net/cgi-bin/idbpf

For the LC filters elsewhere, I just scale the values given in tables.

> 
> Did you buy the YIG oscillator as a canned block or did you manage to
> buy a YIG resonator and design an oscillator around it?

These sell for around $50 on Ebay, so I just bought the canned
oscillator. I got a quote to buy a new one. It was $1000.

> How do you do the sweeping?  Is it PLL controlled or more of a free
> running  deal like the plugins for the old HP141's?  If it's free
> running, do you have one of those "lock and roll" loops?

The YIG is phase locked to the nearest 1 MHz. The 2nd LO is fixed (and
phase locked). The 3rd LO is an NCO in a FPGA.
 
> You don't have a tracking generator to go along with it by any chance do
> you?  Actually I guess you did say network analyzer.  Is it a vector or
> scalar analyzer?  Reflected as well as transmitted response?  Full two
> port?  Supports the full 12 term calibration?

Yes, there is a tracking generator. It is a vector analyzer. It just has
a transmit and recieve port on the front panel, but I left some room in
the box for the relays to do full two port. For now, I will just use
a directional coupler externally for reflection. I hope to code the 12
term calibration, but that may be a year away.

> How's your front end sensitivity and dynamic range?

The dynamic range should be around 80 to 90 dB. The ADC noise floor and
intermod are both around that level. The sensitivity should be around
-130 dBm. I have been using your RF cascade tool to look at these things.
Thanks. Those two numbers will not really be known until it is built.
They just take into account gain, noise figure, IP3 and ADC quantization
noise. My layout will likely affect these.

> Do you by any chance have the phase lockable 10 MHz reference I/O like
> many HP boxes?

If I have space on the board, and it looks like I will. I have actually
been thinking about making it accept any multiple of 200 kHz since I have
some nice 19.2 MHz OCXOs. Right now, there is just a 10 MHz TCXO in there.

> I guess I should just wait to see the design files as that will answer
> most of my questions.
> 
> -Dan
> 

To clear up any confusion, it should be noted that digital IF and software
defined radio techniques are used. I am samping at 62.5 MHz. 

-- 
Darrell Harmon
http://dlharmon.com