Re: gEDA-user: PCB Autorouter Status?

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

DJ,

I went through the design and got it to pass all the drcs.

run drc get 

No DRC problems found.

optimize rats get

590 rat lines remaining

autoroute all rats nests get

The rats nest is stale! Aborting autoroute...

try 1)

using layers component, signal1 and solder

try 2)

using layers component, signal1, solder, gnd, power1, power2


both trials give up with the stale rats nest message.

I am going to make a copy of the design file as it is now and set it
aside so that if Anthony wishes to take a look at getting it autorouted
that he can.

For now, I am going to start hand routing 590 rat lines.

Thanks for the suggestions/advice, 

Steve Meier


On Thu, 2008-05-01 at 16:32 -0400, DJ Delorie wrote:
> Ok, some stupid things to check:
> 
> Your current route style meets your DRC requirements.
> 
> The layers you want to route on are visible; all others are off.
> 
> Maybe we should get Anthony to look into this, as part of his learning
> experience?



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