Re: gEDA-user: Routing Rat lines - ?

[Ben Jackson <ben@xxxxxxx>]

On Wed, May 14, 2008 at 01:33:14PM -0700, Larry Doolittle wrote:
> 
> My last big project was similar ~900 rats.  I, too, routed
> them all by hand.  All the difficult stuff is analog, and
> there's no way I'll let an autorouter in the same _building_

Yeah, the 900-rat board of mine was split between big data busses
and critical analog parts.

> Finally, I had to play connect-the-dots for an afternoon
> to take care of the remaining digital wiring, which then
> gets back-annotated for the pin mapping on the FPGA.

Yes, I don't mind routing by hand, but I'd like some better tools for
doing FPGA pin routing.  I'd turn on the number-in-pad options for
various pins and take advantage of the bulky names I gave each pad
(like DQ1L0/LVDS13p/IO) to route parts of a bus that I had not yet
connected in gschem.  Then once I was happy I'd fix up the schematic,
which was mostly "busrippers" anyway.

Ideally I'd like to be able to say "this net needs to go to a pin on
U10 with this feature" where a feature might be a bank, or ddr capability,
or a clk input, or whatever.  It would get trickier when it was something
like an LVDS pair or a DDR input with a matching DQS...

-- 
Ben Jackson AD7GD
<ben@xxxxxxx>
http://www.ben.com/


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