Re: gEDA-user: Adding inner polygons to a plane

[DJ Delorie <dj@xxxxxxxxxxx>]

One of the things I suggested for Peter's pours branch is to add
another level of polygon-ness.

To summarize, pours creates two layers of polygons - the layer the
user creates, and the "cut up" polygons caused by traces, vias, etc.
PCB's core sees the cut up polygons, not the user ones, so things like
DRC and connectivity work properly.

I suggested a layer of cut-lines between the user polys and the cut up
pols, thus:

Level 1: user-editable top-level polygons (whole polys)

Level 2: user-editable "traces" which slice up polygons (sliced polys)

Level 3: PCB PolygonType objects further cut up by polygon clearances
         etc (sliced & cleared polys) (i.e. what you see in the gerbers)

Level 4: output of polygon dicer (sliced, cleared, and diced polygons)
         (transient, used by exporters)

In this example, the user would create one board-sized whole polygon,
and suitable lines to slice it into the two power regions (3.3v and
1.8v) (sliced polys).  These two sliced polys would then be further
broken up by traces, vias, pins, etc, to make the final board.


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