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Re: gEDA-user: An idea: rework design support...

On May 13, 2011, at 7:10 AM, Peter Clifton wrote:

> Hi everyone,
> I just thought I'd document this idea in order to get some feedback. I
> have no time to implement it for the foreseeable future, but it might
> provide someone inspiration to get hacking on PCB.
> I sometimes find myself working within a particular generation of
> prototype board, wanting to modify it in order to chance aspects of the
> circuitry.
> I'm fairly confident this is a common task, since it is rare that a
> prototype will work perfectly first time and NOT require modification,
> nor would the designer always send a new spin of the board for
> manufacture in order to test modifications which could be tested by
> rework.
> Rework may involve leaving components off the board, fitting blue-wires,
> lifting pins or cutting traces. It may also involve adding components
> "dead bug" style.
> Managing the build state and netlist of a reworked board is tedious
> manual work. We should ideally support:
> 1. Updating schematics with changes (perhaps having a way to grey out or
> dot-dash draw omitted components).
> 2. Forward those changes into PCB

Two pieces here, that *must* be kept cleanly separated:

A. To gnetlist, add a facility to allow a back end to figure this out.

B. To gnet-pcb.scm, add the code to use such a facility.

> 3. Annotate on a "rework" layer (or layers), where modifications take
> place to the board.

In ancient Greek astronomy, when the theory of planetary motion didn't fit the data, they added "epicycles". "Layers" have become pcb's epicycles: every time somebody wants a "feature", they propose a new kind of layer. This pollutes the fundamental geometric significance of layers. It entangles design capture, geometry, and design export in complex and confusing ways. Geometry, composition, and constraint are different things and deserve fundamentally different mechanisms.

John Doty              Noqsi Aerospace, Ltd.

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