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Re: gEDA-user: Two things ... or actually, three

On Tue, May 31, 2011 at 05:09:25AM +0200, Kai-Martin Knaak wrote:
> Richard Rasker wrote:
> > OK, I'll start by reading up on the light vs. heavy symbol discussions.
> > Do I understand correctly that heavy symbols basically have certain nets
> > with predefined names (e.g. VCC, GND) implicitly included, whereas light
> > symbols offer the pins to connect those nets oneself? 
> Not quite. There seems to be a consensus, that hidden nets are bad style.

Here I respectfully disagree, unless or until you can make a single schematic pin
correspond to a (potentially long) list of physical pin. 

To my knowledge this is not the case right now. Of course the pin numbers
should not be shown on the schematics: they would use up too much schematics 
real estate and are not interesting anyway (even relatively simple and cheap
FPGA devices like XC3S700A has 88 power pins in the 256 pins BGA package, 
that's ~35% of the pins): you can't check anything in a BGA package and even
on package that can be probed, it is extremely hard to find, say, a bad solder
joint since all pins of the same power rail are internally connected together.

> At least, I haven't seen anyone advocate net attributes in the default lib.

That's very different. More often than not I have to override the net=VCC
attribute in the existing library for simple logic devices, so the fact
that there is a default can lead to errors (it would be better to have an 
attribute hidden_pins=list_of_pins that produces an error at netlist
generation time if some of these pins have no net=attribute). We no more 
leave in the world where "the logic power supply is +5v, period ".

In some cases it is even the net=GND:whatever that I have to override 
(microwave GaAs switches often work with a negative power supply, and 
GND is the positive power rail).


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