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Re: gEDA-user: one schmatic ==> two netlist




Hi Stuart,


> I assume this is also known as "extracting the parasitics", i.e. after
> you lay out the IC you can run a tool which creates a netlist with the
> device connectivity, along with estimates of the parasitic
> capacitances obtained by calculating the distance of the structures
> from each other and from the substrate.  Right? 

Right. The same comand is used to create a spice netlist for LVS.

> And what you want to do is use gschem to capture the schematic & then
> create a spice netlist from it to do the comparison with the netlist
> extracted from the layout, right?

Right. I do have a digital schematic with ands, ors, multiplexers, ..... 
First I create a verilog netist for simulation. The simulation tool (Synopsys) 
creates a EDIF netlist which can be read in by the layout tool (Tanner). 
After place & route, on the finished layout, I can do a extract and get I 
spice netlist. I can choose between a transitor level or gate level 
representation. I choose the second one  and get for every gate a subcircuit 
in my spice netlist.
Now I can compare it with a spice netlist from gschem.


The problems are comeing up, when I have transistors and digital gates in the 
same schematic. I have to check out what your spice netlister is doing with 
my digital symbols. I have to find a way to get them as subcirciuts in the 
netlist.

I will try ....


Peter