Re: gEDA-user: pcb, vias that connect to a polygon for full thermal dissipation

[Stefan Salewski <mail@xxxxxxxxxxxx>]

Kai-Martin Knaak wrote:

>How about doing the edit yourself? Ales is the one to ask for an
>account.

Yes, maybe I should ask for an account.

The problem in this case is: I would replace a long, now obsolete
paragraph (which someone has written with care) with a short sentence.
The original author my be not too glad about this. (I think leaving old,
outdated information in a wiki is a bad thing -- but this is my personal
view. Some people prefer to carry together as much text as possible.)

--
"How do I place vias that connect to a polygon for full thermal 
dissipation or full shielding integrity?"
--
My new text:

"Current version of pcb can insert many different thermal symbols,
including one which connect completely to polygons. Press the SHIFT key
while using the thermal tool to cycle through the different thermal
symbols."

Old text, which I would remove completely:

"Often it’s useful to have vias connect completely to a polygon (a field
of copper) for heat transfer– the apparent problem is that PCB polygons
have only a single “clear pins/vias” flag for the entire polygon
(toggled by the [s] key). Our goal is to only connect some of the
pins/vias to the polygon, but to connect them better than a thermal
does. Here are a few ways to do this:

One way, you’ll make an object that’s almost just like a thermal in that
it goes between your via and the polygon–the difference is that you’ll
actually create an annulus to completely fill the space between the hole
and polygon (which because it’s clearance is turned on, is not connected
to the pin). This annulus is four arc segments. You can copy these four
items to the buffer to create a “zero-clearance thermal tool”. The
drawback of this trick is that when you change via size, you’ll also
have to modify the size of these filler parts.

The arcs allow you to use this fill trick in tight places by only
placing, say two of the four arcs.

Another trick is to make a zero-length line. Take a single line segment
and move the end-point on top of the start-point. Now you have a “single
point line” (a circle) with the diameter equal to the line thickness.
Move to different layers ([m] key) as you see fit. Place this object
centered on your via to connect it to a polygon.

Power-users may want to keep a small custom library of these parts by
saving them as elements. It’s also handy to put these “parts” in one of
your PCB buffers so they’re at your fingertips.

You can also add another polygon on-top of the polygon to which you want
to connect you vias. You’ll un-set the “clear pins/vias” flag and the
vias will be connected to the larger polygon underneath."


 



_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user