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Re: gEDA-user: Need a reminder: decoupling caps for TTL logic?

Am Dienstag, den 11.11.2008, 20:53 +0100 schrieb Stefan Salewski:

> 
> I think symbols with hidden power pins have net-attributes like
> net=VCC:1 or so. You may place a Power-Symbol with same net Attribute
> and connect your capacitor to it.
> 

Actually 

net=Vcc:14

you can make this visible by Edit->Show/Hide invisible text from menu.




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