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Re: gEDA-user: bugs, warts and feature requests
No. 22 to no. 30:
22) pcb feature request: DRC should check for accidently exposed copper.
(e.g tracks near pins with big clearance.)
23) pcb feature request: Allow rectangles and polygons on silk
24) pcb feature request: Add the ability to do complex searches like
"Select all 15 mil tracks that have the join flag set"
25) gschem feature request: optionally add all slots of a symbol at once.
This would make sure, to not forget some slots.
26) pcb feature request: show (and enforce) DRC limits while moving
tracks, opions and vias.
27) gnetlist feature request: if no -o option is given, output of the bom
backends should be sent to standard out. This would allow for pipelines.
28) pcb bug: On import of layout data, preview of identical footprints is
invisible if their number is even. This is probably due to XOR graphics.
29) pcb wart: On import, layout data in paste buffer is not at mouse
position, but a few centimeters to the right and to the bottom.
30) pcb-GL wart: If I move the mouse very fast, the cross follows slowly.
This gets worse if the processor is busy for some reason.
---<(kaimartin)>---
--
Kai-Martin Knaak
http://lilalaser.de/blog
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