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gEDA-user: PCB Copy Issue



Ladies and Gentlemen - 
    I have run across an issue with copy and paste that I think should
be brought to your attention. I am trying to prepare a panelized version
of two PWBs I am developing.  The sequence of events I followed is:

1) I prepared PWB 1 as a five layer (Outline and 4 working layers)
board. It has a prominent top layer pour in the RF section, easily
visible.

2) I selected the layers Outline (L1) and the four working (L2 - L5?)
and Cut them to Buffer.

3) Without shutting pcb down I executed "Load Layout" to load a blank
D-Size format with the 12 x 18 outline of what will be a panel.

4) I Used the Menu Commands (selecting Buffer -> Rotate Buffer 90 degree
CCW) to rotate the board in memory

5) I zoomed in on the bottom corner to orient myself and pasted the
buffer contents by right clicking the mouse.

6) I right "dragged" the screen to get to the next position for the
paste and left clicked to get a paste operation. (This step was repeated
2 additional times)

Issue:

The Top Board Layer pour WAS present in the first paste operation. It
disappeared in the three subsequent pastes. This configuration was
visible when I closed the file after creating it. I've included the
file.

In subsequent openings, the pour was visible on pastes two and three,
but NOT on pastes 1 and 4 (they go from left to right). Also - screen
updates take several seconds between updates - upwards of 10 to 12
seconds per update.

In the command window I use to open pcb the message:

Error while clipping PBO_SUB: 3

appears.

I checked the gerber output after re-opening the file, and the pour is
in fact on pastes 2 and 3, but NOT in pastes 1 and 4.

Just thought I would bring it to the developers attention. I am using
Fedora 11 and (to my knowledge) the most recent release of the tool. I
will be happy to do any additional tests/observations and report the
results.

I can have my fab house do the panel, but I was giving it a shot
myself...

Cheers!

Attachment: Copy_Issue.pcb
Description: application/pcb-layout


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