Re: gEDA-user: How to deal with single/dual parts?

[Dave N6NZ <n6nz@xxxxxxxx>]

My approach would be to use a NAND symbol, a power symbol, and slotting.

I'm curious as to why you found slotting problematic?  It's no more or 
less obtuse than the rest of gschem.

-dave

Bill Gatliff wrote:
> Guys:
> 
> 
> I can get TI's LittleLogic NAND gates in single (SN74LVC1G00) and dual
> (SN74LVC2G00) varieties.  At the schematic level, however, I'd prefer to
> just have a NAND symbol and a separate symbol for the power pins.
> 
> One way to solve this problem is to have a symbol named sn74lvc1g00.sym
> for the single-gate case, and sn74lvc2g00-1.sym and sn74lvc2g00-2.sym
> for the two gates of the dual-gate part.  Then just pick--- and
> re-pick--- the right one as I sort things out at layout time.  (Add one
> symbol each for the power pins).
> 
> At the moment, I really don't want to deal with much back-end scripting
> to make selection more automated.  And the slotting feature has left a
> bad taste in my mouth in the past due to errors in the symbol.
> 
> Given all that, is the three-symbol approach described above the most
> straightforward way to deal with my situation?  Or am I missing
> something obvious?
> 
> 
> b.g.
> 



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