Re: gEDA-user: PCB+GL Testers (please test)

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Sat, 2010-11-06 at 21:42 +0100, Frank Bergmann wrote:

> Segmentation fault happens in hidgl_clean_unassigned_stencil() 
> (hid/common/hidgl.c:1069) and backtrace goes into 
> /usr/lib/dri/r300_dri.so, so maybe its a problem in the driver.

Can you try again with the latest code (I just pushed it now). Default
compile will give you VBOs, but with data uploaded wih glBufferSubData.
That was about the fastest I could manage on i965.

Tweakable options are:

Uncommenting
// buffer->use_vbo = false;

or

removing / commenting:

buffer->use_map = false;

from hid/common/hidgl.c's hidgl_init_triangle_array()

use_vbo = false; will give you arrays (always)
Removing use_map = false; will give you mapping with use_vbo, or arrays without.

Regards,

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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