Re: gEDA-user: gEDA and PCB ------

[sdb@cloud9.net (Stuart Brorson)]

You can download Xilinx's WebPack for free here:

http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?sSecondaryNavPick=Design+Tools&key=DS-ISE-WEBPACK&sGlobalNavPick=PRODUCTS&BV_SessionID=@@@@0359064150.1097249400@@@@&BV_EngineID=cccfadcmkekejlfcflgcefldfhndfmo.0

(Hopefully that will link.  If not, just browse around the Xilinx site
for WebPACK 6.3i.)

As for Icarus or some other free tool supporting Xilinx (or any other
vendor) bit streams:  There was some talk about doign just this about
a year ago.  Where?  Maybe Open Cores.  However, it is very unlikely
that it will actually happen because the bitstream depends upon the
very specific details of each  FPGA's proprietary LUT architecture.   

Anyway, since Xilinx & Altera give away free (as in beer)
programming software for their stuff, only the most die-hard free (as
in freedom) software type would want to spend their time re-writing
the bitstream generating stuff.

Stuart



> 
> Welll that depends on a few things. What do you mean by free? Free as in=20
> open source or free as in no cost? From xilinx you can get a no cost=20
> version of their tools. But these only support some devices. Is Icarus=20
> capable of generating the bit stream? That I don't know.
> 
> Steve Meier
> 
> Karel Kulhav=FD wrote:
> 
> >On Fri, Oct 08, 2004 at 07:30:48AM -0700, Stephen Meier wrote:
> > =20
> >
> >>Well for about $2500.00 you can buy from xilinx their foundation tool=20
> >>set which does run on linux as well as windows and solaris.
> >>
> >>We actually used Icarus to model the verilog code and then use the=20
> >>xilinx tools to turn it into a bit stream.
> >>   =20
> >>
> >
> >Is it possible to convert .xnf into JEDEC for Xilinx using some free sof=
> tware?
> >
> >Cl<
> > =20
> >
> >>Steve Meier
> >>
> >>
> >>Karel Kulhav=FD wrote:
> >>
> >>   =20
> >>
> >>>On Thu, Oct 07, 2004 at 07:30:33PM -0700, Stephen Meier wrote:
> >>>
> >>>
> >>>     =20
> >>>
> >>>>My board is off to the fab house. 15 inches by 8.6 inches some 1050=20
> >>>>parts. I will write a script to count pads latter.
> >>>>
> >>>>Xilinx Virtex II pro V30.... 896 pin BGA 1 mm pich vias in pads
> >>>>
> >>>>(4) 100 pin quad flat pack devices.
> >>>> =20
> >>>>
> >>>>       =20
> >>>>
> >>>How do you program the Xilinx?
> >>>
> >>>
> >>>
> >>>     =20
> >>>
> >>>>8 layer board which really isn't enough.... time to get PCB to have a=
> =20
> >>>>reasonable number of layers... yes yes i know it will be a lot of wor=
> k.
> >>>>
> >>>>Back anotation is missing so I wrote a program that flips the pins in=
> =20
> >>>> =20
> >>>>
> >>>>       =20
> >>>>
> >>>What is back annotation?
> >>>
> >>>Cl<
> >>>
> >>>
> >>>
> >>>     =20
> >>>
> >
> > =20
> >
> 
>