Re: gEDA-user: QFP fan-out tips

[John Doty <jpd@xxxxxxxxxxxxx>]

On Oct 6, 2007, at 7:25 PM, Andy Peters wrote:

> On Oct 6, 2007, at 6:37 AM, Randall Nortman wrote:
>
>> On Sat, Oct 06, 2007 at 07:21:22AM -0400, Bob Paddock wrote:
>>>
>>>> I route power inwards under the chip, with vias to the power
>>>> planes and
>>>> the decoupling cap on the other side.
>>>
>>> Sometimes doing that adds enough inductance to cause problems,
>>> in high frequency boards.
>>
>> What does "high frequency" mean?  I'm in the <50MHz range.
>
> It's not the frequency that's important, it's the rise time of the
> signals.

Yep. That, and the response time of inputs. I know of a recent NASA  
mission where a processor chip was "derated": operated at a speed  
lower than normal spec in hopes of improving reliability. The board  
was made with relatively bulky components (again for reliability),  
and therefore somewhat spread out. Theoretically adequate for a chip  
as slow as the derated chip, but..

The chip itself was, of course, much faster than its derated spec.  
And when they tested the "cold case" (-20 C, I believe), that made it  
even faster. The system failed the test. It turned out that better  
bypassing (capacitors closer to the pins) was needed.

Moral: useful reliability is a property of systems, not of  
components. Don't let component reliability considerations damage the  
system design.

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx




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