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Re: gEDA-user: pcb, howto partition power planes?

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Subject: Re: gEDA-user: pcb, howto partition power planes?
From: DJ Delorie <dj@xxxxxxxxxxx>
Date: Tue, 28 Oct 2008 14:49:37 -0400
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> In my 20+ years in engineering I have yet to see one case where
> splitting a ground plane under high-speed ADCs has worked.

What about high precision ADCs?  I'm working on a design using ADE7753
power monitor chips (16-bit ADCs) , and their own app note (AN564)
shows a ferrite isolating analog ground, and a 10R resistor isolating
AVdd.


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