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Re: gEDA-user: pcb crooked traces
On Sat, 2010-10-09 at 11:06 -0600, John Doty wrote:
>
> I am surprised by the efficiency debate. I would think that for pcb,
> the vast bulk of calculation involves rendering graphics in device
DRC checks, clearing polygons,...
Auto-Router may be distinct problem, I think Anthony did export/import.
But maybe we want a push and show done inside of PCB.
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