Re: gEDA-user: pcb outline clarification

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Mon, 2010-10-25 at 12:53 +0200, Markus Hitter wrote:
> Am 25.10.2010 um 03:43 schrieb gene glick:
> 
> > My "outline" layer was labeled "Outline".  Changing it to all lower  
> > case fixed it.
> 
> I'm about to offer a patch to allow upper case characters as well,  

We did at one point have various code in PCB which accepted mixed case
names, (strcasecmp rather than strcmp). Unfortunately, it wasn't
consistent, and some code was still case sensitive.

I committed a change which made everything support mixed case, but after
some discussion, reverted it and made everything consistently case
sensitive.

That means less magic names to filter out when we convert (soon I hope)
to more explicit layer type tagging. Since we're aiming for layer type
tagging, patches introducing further special-casing for layer names will
likely not be accepted.

> and allow the outline to be on the solder side. The later would allow  
> to mill the outline on single sided boards.

Do you mean flipping the outline layer so the router is effectively
working from the underside of the board? Sounds like a potentially
useful flag. Presumably the G-code exporter already flips the solder
side.

Adding a property to the exporter to flip the outline layer would
probably be the easiest way to proceed for now.


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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