Re: gEDA-user: iverilog FPGA examples

[Stephen Williams <steve@icarus.com>]

clepple@ghz.cc said:
> While poking around the verilog/examples directory, I noticed that
> initial  values for registers don't seem to be handled anymore.

That is true, although I'm looking into recovering that functionality
in the new synthesizer.


clepple@ghz.cc said:
> Also, it doesn't appear that the FPGA target is generating NCF files.

The EDIF code generator can include the pad information in the EDIF
file, and the map/par actually pays attention. The XNF reader did
not heed embedded pad information so needed an extra file to carry
pad assignments.

And yes, I'm planning to render the -txnf target obsolete, although
it currently supports the XC4000 family, whereas -tfpga does not yet.
(The -tfpga can theoretically target non-Xilinx parts as well, but
detailed function generators are needed.)

The new synthesizer is tons better, but the documentation has not
caught up yet. There are also a few remaining rough edges.
-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
steve at picturel.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."

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