gEDA-user: Segmentation Fault

[John Luciani <jcljr58@yahoo.com>]

I have found a condition that causes PCB to 
Segment fault.

I created an element that has a mounting hole 
but I forgot to change bit 3 in the pin flag. The 
PCB layout below contains the element with the
incorrect pin flag. The netlist below just 
connects all three pins of the symbol.

The following actions produce the segment fault:

 1. Load the PCB layout.
 2. Load the netlist
 3. Optimize the ratsnest.

(* jcl *)

############## BEGIN PCB LAYOUT ####################
# release: pcb 1.6.3
PCB("" 6000 5000)
Grid(10 0 0)
Cursor(10 270 3)
Flags(0x000000d0)
Groups("1,2,3,s:4,5,6,c:7:8:")
Styles("Signal,10,40,20:Power,25,60,35:Fat,40,60,35:Skinny,8,36,20")
Element(0x0 "AC-inlet" "CONN1" "Qualtek_703W-00/52"
-1011 -773 0 100 0x0)
(
   Pin(-275 0 96 79 "" "1" 0x01)
   Pin(0 0 96 79 "" "2" 0x01)
   Pin(275 0 96 79 "" "3" 0x01)
   Pin(-777 -287 96 79 "" "" 0x01)
   Pin(777 -287 96 79 "" "" 0x01)
   ElementLine(0 78 -537 78 10)
   ElementLine(-537 78 -986 -196 10)
   ElementLine(-986 -196 -986 -629 10)
   ElementLine(-986 -629 986 -629 10)
   ElementLine(986 -629 986 -196 10)
   ElementLine(986 -196 537 78 10)
   ElementLine(537 78 0 78 10)
   ElementLine(-600 -629 -600 -688 10)
   ElementLine(-600 -688 600 -688 10)
   ElementLine(600 -688 600 -629 10)
   ElementLine(19 196 -19 196 10)
   ElementLine(-19 196 -19 118 10)
   ElementLine(-19 118 19 118 10)
   ElementLine(9 157 -17 157 10)
   ElementLine(-255 118 -255 196 10)
   ElementLine(-255 196 -295 118 10)
   ElementLine(-295 118 -295 196 10)
   ElementLine(255 118 255 196 10)
   ElementLine(255 196 295 196 10)
   Mark(0 0)
)
Layer(1 "solder")
(
)
Layer(2 "GND-sldr")
(
)
Layer(3 "Vcc-sldr")
(
)
Layer(4 "component")
(
)
Layer(5 "GND-comp")
(
)
Layer(6 "Vcc-comp")
(
)
Layer(7 "unused")
(
)
Layer(8 "unused")
(
)
###################### END PCB LAYOUT


###################### BEGIN NETLIST

unnamed_net1	CONN1-2 CONN1-3 CONN1-1 

##################### END NETLIST


	
		
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