Re: gEDA-user: Segmentation Fault

[John Luciani <jcljr58@yahoo.com>]

Thanks for the reply. I already fixed the element.

I noticed an additional non-catastrophic infelicity
in the optimize netlist function. The netlist function
seems to ignore all non-digit characters that follow
the number in a reference designator.

I have a layout where I have options for different
capacitors so I had refdes's C4a C4b. The optimize
netlist function does not see the nets for C4a and
C4b although they list in the netlist window.

I changed the refdes's to C4a1 and C4b1.

(* jcl *)





--- Dan McMahill <dan@mcmahill.net> wrote:

> On Tue, Sep 07, 2004 at 01:42:38PM -0700, John
> Luciani wrote:
> > 
> > I have found a condition that causes PCB to 
> > Segment fault.
> > 
> > I created an element that has a mounting hole 
> > but I forgot to change bit 3 in the pin flag. The 
> > PCB layout below contains the element with the
> > incorrect pin flag. The netlist below just 
> > connects all three pins of the symbol.
> > 
> > The following actions produce the segment fault:
> > 
> >  1. Load the PCB layout.
> >  2. Load the netlist
> >  3. Optimize the ratsnest.
> > 
> > (* jcl *)
> > 
> >    Pin(-275 0 96 79 "" "1" 0x01)
> >    Pin(0 0 96 79 "" "2" 0x01)
> >    Pin(275 0 96 79 "" "3" 0x01)
> >    Pin(-777 -287 96 79 "" "" 0x01)
> >    Pin(777 -287 96 79 "" "" 0x01)
> 
> Its because there is no pin number for the last 2
> pins.  I'll see about
> fixing pcb to avoid a segfault, but you should fix
> the element.
> 
> -Dan
> 
> -- 
> 



	
		
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