Re: gEDA-user: silk exclusion (was [pcb] MinMaskGap action )

[DJ Delorie <dj@xxxxxxxxxxx>]

> I believe that because some board fab houses refuse to apply rs274x
> erasures to silk layers, the silk clipping was intentionally
> removed.

Right.  Even 4pcb puts a hold on orders with silk overlapping mask
holes (they can cut them or leave them, but they ask first), so we
stopped trying to cut them out that way.

> Of course some fab houses refuse to apply erasures to copper 
> layers too, but we haven't gutted that - it's just too darn useful.

Actually, I think we fixed that - it wasn't the erasures, it was
trying to *panelize* the erasures, because they all had the same
internal layer name.  They're unique now, should be OK.


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