Re: gEDA-user: Marketing gEDA

[John Griessen <john@xxxxxxxxxxxxxx>]

al davis wrote:
> On Thursday 06 September 2007, Larry Doolittle wrote:
>> PCB can't do the automated parasitic extraction and signal
>> integrity simulations that high end software suites can.
> 
> Actually, a first cut, without crosstalk, is fairly easy to do.  
> First, we need a translator, to translate from the PCB format 
> to a simulation language.  Then, we need electrical models of 
> the traces, vias, etc.  Then, we need to model the drivers and 
> receivers, which are usually specified as IBIS models.
> 
> The easiest translation is to Verilog-A, the structural subset, 
> which the gnucap snapshot now accepts.  It should be a lossless 
> transformation, with a back translation also available.

I may be able to justify this work for a switching power supply
design coming up.  A 1 dimensional model where shape of transmission lines
is not considered is what you are saying, right Al?  Since PCB's paths
are all on centerlines, I imagine I could use all analytic geometry
to get a trace parameters vs. length representation made.  But, you said
a two way translation.   I suppose it wouldn't be too too hard to put all
the 3D info into sim format...for future use and for back translation.

Does Verilog-A have a 3D format as part of it, or does one need to be chosen
and incorporated as an extension of Verilog-A?

John Griessen

If we had a GUI that connected gschem-gnetlist-PCB-gnucap to the MIT electromagnetics program
for for field solving, such that changing number of vias and size of vias and resimulating gave
a different transmission line simulation at a receiver pin with some reasonable default assumptions,
thousands would be trying gEDA on the Fedora discs overnight
so they could have new-grads iterate that sim until the ground bounce
or overshoot was OK...  That would be marketing! :-)

John Griessen

-- 
Ecosensory   Austin TX


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