Re: gEDA-user: a pcb level panelizer tool

[DJ Delorie <dj@xxxxxxxxxxx>]

> Oh..  it seems as if page-renumber and renumberBlock() could be out of 
> sync if you didn't have a one to one correspondence of schematic page to 
>   layout array zone...   And renumberBlock() ins't updating the netlist 
> either...

Right.  Page-renumber and gsch2pcb take care of the netlist,
RenumberBlock() and RenumberBuffer() just save you from having to lay
the same thing out over and over again.

> What would it take to update a netlist from a layout change?

That's the general "back annotation" problem we've talked about
before.  In this case, it would be the wrong thing to do - you start
with one U14, you create a *second* U14, *then* renumber *one* of them
to U24.  Which schematic do you update?

I think a better long-term goal here is to add heirarchical PCBs, and
match them to the heirarchical schematics.  Then you could lay out one
exemplar block and instantiate it once for each module.


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