Re: gEDA-user: next PCB release - 1.99za vs 4.0

[Andrew Poelstra <asp11@xxxxxx>]

On Sun, Sep 12, 2010 at 12:53:57PM -0400, DJ Delorie wrote:
> 
> > Well, a both-sides silkscreen layer makes little sense. If a user
> > wanted that, he could duplicate the top silkscreen to get the bottom
> > one. I don't think that would be common enough to require special
> > code.
> 
> Outlines for bolts, cutouts, mechanical clamps, etc.
>
> But it's just a special case of support we need elsewhere - for
> example, a both-sides soldermask is very common, so much so that most
> FABs charge you less if both masks are the same.  In that case, any
> customization to the mask would need to be on a both-sides layer.
>

Alright, we'll allow a "top and bottom" layer group.
 
> > I think that if we want components on multiple layers (or all
> > layers), that should be a property of the component, not a layer
> > group/physical layer thing.
> 
> What's the difference?  It has to be implemented somehow.
>

Well, I'm trying to implement this, so "somehow" matters to me ;).

> > From a development stance, how do we want to structure layers and
> > layer groups? It looks to me that we should have layer groups map
> > to physical layers. Within each layer group, we can have as many
> > drawing layers (of whatever types) as we want.
> 
> I suspect the internal structure is... we have a list of layers.
> Anything that needs a layer group, really just wants a subset of
> layers, and we need to make sure that filtering layers is fast.  I see
> no reason to have any more structure than that, it just complicates
> the design.
>

I disagree. If physical layers can contain multiple drawing layers (and
they must, to keep silk and copper layers separate), it makes sense to
have a rigid structure. Then we can display the layer selector in a tree-
like display and it is clear to everyone what is what.

See the current incarnation of my layer structures:
http://download.wpsoftware.net/code/pcb/layer.h


I'll copy out the important comment in that file:

The layer structuring works as follows:
  1. At the top level, each PCB has a layer stack. This is the ordered
     list of physical layers, plus one "internal" layer that is never
     saved out or edited. (For now, this will contain the ratsnest layer
     and nothing else.)

  2. Each physical layer is called a "layer group". It can contain
     indefinitely many drawing layers. Layer groups are one of TOP,
     BOTTOM, INNER or OUTER. There is at most one of each TOP, BOTTOM
     and OUTER layers. There can be any number of INNER layers, which
     will be ordered by their z-index.

  3. Each drawing layer has a type associated with it - one of COPPER
     (conductive), SILK (non-conductive) or INTERNAL (not saved out:
     DRC highlights, etc, will be on such a layer).

  4. TODO: There is no way to do keepouts. I have heard arguments for
     allowing global keepouts, per-layer keepouts, per-function-block
     keepouts, etc, and I don't know how it should be structured.



Andrew
 


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