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Re: FORTH plusminus, was Re: [f-cpu] Winograd DCT on my seul.org account

<snip hi> 
> hi, five (after Jürgen) 
hi, again 
> > > > > > But what we can do is detecting where we lost cycle. 
> > > > > > (It's what I plan to do in my asm). 
> > > > > it's like calling the doctor who says : "you're sick" and goes away. 
> > > > Exactly, but actually the human are better than our algorithm, no ? 
> > > no, what i meant is : knowing the problem doesn't solve it. 
> > > If you can detect a pipeline stall, it won't tell you why it is there, 
> > > and how to remove it. OTOH an algorithm that creates good code 
> > > _by_construction_ is more interesting because you don't have to check 
> > > the result. 
> > you can't create a code right scheduling _by_construction_. You nead a 
> > special pass that do the scheduling. 
> no. that's the point. you have to think about scheduling with a 
> different approach. adding a "rescheduler" at the butt of a dumb algorithm 
> is under-efficient, the scheduling constraints must be taken into account 
> in the whole program. 
What you mean is that your algorithm is scheduling before the compilator do 
something. It's a big problem, that mean that if we change some coding rules 
for a CPU branche you need to redo and maintain an other scheduling version of 
your code... It's like asm ! 
I think that you understand the problem. The only way to schedule an algorithm 
in a high level language is after you generate the assembler, and this 
assembler can't be rigt scheduled when it's generated, because the 
intermediate representation didn't reflect the asm language. 
I know you will say that we only need to change it... But the intermediate 
representation reflect the source language and human thinking method, so that 
mean that you want to change the language ! It's perhaps possible to generate 
a more near assembler IR, but it will only reflect the language scheduled 
algorithm... same problem ! 
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