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Re: [f-cpu] Collection of links since I joined

hi !

Beat Steiner wrote:

YG's links extracted from previous mails:

> http://f-cpu.seul.org/
> http://f-cpu.seul.org/new/19c3-presentation.pdf
> http://f-cpu.seul.org/cedric/unstable/F-CPU_manual-0.2.7c-en-color.pdf
Hmm. Only the "stable" version linked on f-cpu home page?
www.f-cpu.org has not been updated for .... a long time :-)

> http://f-cpu.seul.org/new/?M=D
> http://www.burched.biz/ (FPGA board)
> http://f-cpu.seul.org/whygee/CDC/Grishman_CDC6000AsmLangPgmg.pdf
> http://f-cpu.seul.org/whygee/CDC/DesignOfAComputer_CDC6600.pdf
> (my best recommended read for any CPU-designer-wannabe)

OK. I'm really a wannabe, and I still have to read a lot. I downloaded it.
Looks really nice. Its great that the author gave the permission to publish
the scans.
the DoaC book is really more accessible and less academic than the
famous P&H books.

Register-mapped I/O is only a good alternative if th Xbar gets too
i don't think there is a relationship.
FC0's memory access mechanism
is a compromise between "true" Load/store architectures
and memory-mapped architecture : instead of
defining address/data register pairs, the LSU (load/store unit)
has small buffers that act like "data registers" and
each buffer is dynamically "associated" to an address
stored in the main register set with a 2-way table.

that means that instead of having 2 "I/O map" registers,
the pointer is stored in _any_  register of the register set,
and data is fetched or stored by the LSU with a load or store

This means that all 63 registers can be used at the same time
for storing only data, or only pointers, or whatever mix.

In that case we could even reserve yet
another register to load constants from opcode.
that's not needed, there's a Xbar port that does that already
and the Xbar data is routed automatically.

read you soon,


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