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Re: gEDA-user: Something worng for line and via sizes



Thanks ! I modified pcb file and fixed.

What is the revert ?

Thanks

Hiroshi

Levente wrote:

On Mon, 10 Apr 2006 19:18:24 +0900
hiroshi <hiroshi@xxxxxxxxxxxxxx> wrote:



When I run DRC and it generates line is too thin !
I checked by info menu, which shows line size is 7.99 mils not 8mils.
I changed line size by Route Style to something else and change back to 8mils.
Still line size is 7.99 and clearance is 9,97mils. Status bar shows 8mils can 10mils clearance.


How can I solve this problem. I reboot system coupel of times too.



It's a known issue with the GUI. What I do is I edit the pcb file manually.... and using the file->revert thing.


Levente