Re: gEDA-user: PCB footprints

[Karel Kulhavy <clock@xxxxxxxxxxxxx>]

On Mon, Aug 29, 2005 at 12:38:51PM -0400, phil@xxxxxxxxxxxxxxxxxxxxxxxx wrote:
> Dan McMahill <dan@xxxxxxxxxxxx> wrote:
> > 
> > Out of curiosity, have you ever come across any sort of textbook 
> > treatment of dual-gate FETs?  
> 
> Art of Electronics has a small reference to dual gate fets Chapter 13.11
> "tuned amplifiers" (pg. 883).  
> 
> Their description is somewhat opaque, but one gate biases the device and
> serves as the input (it's grounded thru an R so it's biased to Idss).  The
> other gate is just a shield because it is 'biased' way higher than the other
> gate so therefore doesn't aid in channel conduction, but does get grounded
> thru a large cap.  It's is a capacitive shield between the drain and the
> signal gate because of the way the part is made, like a tetrode in this
> regard.  How to design the bias voltage on the extra gate, I'll leave to
> Karel.

I want highest gain. So I put there the voltage at which the device has
highest gain according to datasheet :)

CL<