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Re: gEDA-user: Clearing vias (Was: Last code sprint's IRC log and pictures)
Peter Clifton wrote:
>> There are some pictures of my current project on the net:
>> http://www.cl-projects.de/projects/glcd_controller/
>
> Inspired by the detailing around pins on that PCB, I wounder how easy it
> would be to make PCB output like the attached glcd-clearances.png? (This
> is a re-coloured zoom in on a couple of the pins from the above
> project).
I've added a screenshot of the area around the RS232 DB9 connector. This
is how it looks in the PCB tool I use (Protel 98).
BTW, go get the dimensions the big round pads in the images you attached
are 200mil, the tracks are 15mil.
> PCB's output, pcb_clearances.png shows sharp copper edges where clipping
> against a polygon occurs. This can often leave thin slivers of track
> which may / may not connect in production.
Those very thin copper areas at the intersect of the circle around the
pad and this straight, vertical line deliver random results, depending
on how far your etchant can go.
> If its possible to detect these thin slivers and cut them out (if below
> some minimum width), possible rounding their ends as shown?
Don't know, maybe the pcb coders will join this discussion :)
But I'd guess it's the result of different implementations. Protel draws
all those lines and circles that define the outline of the copper area
using tracks with an user-definable width. pcb appears to use tracks
that are infinitely thin. So you get problems.
As you see in the attachment I've made (this is the PCB artwork in
Protel 98) the circles around big pads look clumsy. Actually these
aren't circles at all. When Protel fills an area with a polygon plane
(this is how they call it) they compute and draw the outline of the
plane first (and draw this outline using tracks with an given width) and
then fill the plane with tracks. You can define
1) the track width
2) the grid size, i.e. the space between the tracks
So here I set "grid size" < "track width" to obtain a closed fill.
CU
- C. Lechner
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