Re: gEDA-user: logic analyzers, verilog, and gtkwave...

[Larry Doolittle <ldoolitt@xxxxxxxxxxxxxxx>]

DJ -

On Sun, Aug 09, 2009 at 01:22:20PM -0400, DJ Delorie wrote:
> > It's in the Edit menu, called "Expand" (F3).
> Sweet.  Hmmm... "Expand" again on one of those individual lines should
> re-combine them.

No, you have to select a bunch of individual signals
(they need not be the full set of the original bus, or
even all related) and then "Combine Up" (or Combine Down).
That step is smart enough to label continuous bits as you'd
expect.  Non-related bits get an artificial tag.

   - Larry


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