gEDA-user: uEDA .. was .. Re: Heavy Symbols and such

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Wednesday 05 December 2007, Michael Sokolov wrote:
> Yes, you've hit the nail right on the head!  That's exactly
> how I do it in uEDA, gEDA's evil twin.
>
> In uEDA the master source code for a board is an ASCII text
> file named MCL, which stands for Master Component List.  It
> is not a generated file and it isn't edited by any GUI,
> instead you create and edit it in vi and source-control it
> with SCCS/RCS/CVS/pick-your-favourite.  The MCL is where you
> enter footprints, cap & resistor values, orderable part
> numbers, etc.

Why invent a new language?  Either Verilog-AMS or VHDL-AMS, the 
structural subset, has everything you need.

> uEDA has no GUI though, *all* design entry is done in vi.
>  When the uEDA suite is complete, you'll be able to enter
> your design in vi, then run 'make' and get:
>
> * A bundle of M4-generated PCB footprints to hand over to
> your PCB layout contractor;

Another language.  Again, either Verilog-AMS or VHDL-AMS.....

> * Various BOM forms (the MCL is a BOM in itself, but there
> are other BOM forms too that can be generated from it);

Another language.  Again, either Verilog-AMS or VHDL-AMS.....

> * Printable schematics in PostScript;
> * Netlist file to be loaded into PCB (by you or your layout
> contractor).

Netlist for simulation .. .. the basic one from the schematic, a 
more detailed one including the layout, others ..


I have always believed that tools should be separated into 
an "engine" part and an "interface" part, and the "engine" part 
must use a reasonable language.  Too often, we hide a messy 
language under a GUI, and it never seems right.  With a good 
language, it can be manipulated either way, depending on your 
needs at the time.


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